Hardware-in-the-loop Simulation: a Scalable, Component-based, Time-triggered Hardware-in-the-loop Simulation Framework - Martin Schlager - Libros - VDM Verlag Dr. Müller - 9783836462167 - 21 de abril de 2008
En caso de que portada y título no coincidan, el título será el correcto

Hardware-in-the-loop Simulation: a Scalable, Component-based, Time-triggered Hardware-in-the-loop Simulation Framework

Precio
€ 59,99

Pedido desde almacén remoto

Entrega prevista 13 - 22 de ene. de 2026
Los regalos de Navidad se podrán canjear hasta el 31 de enero
Añadir a tu lista de deseos de iMusic

Safety-critical real-time systems must guarantee correct operation in all operational conditions - even if these conditions are very unlikely to occur (rare events). Hardware-in-the-Loop (HiL) simulation is a common validation technique of real-time systems. In an HiL simulation the environment of a System-Under-Test (SUT) is simulated by an assigned HiL simulator. Thereby, the SUT interacts with the HiL simulator in real-time which necessitates a model of time and interfaces of the HiL simulator that are identical to the model of time and the interfaces of the SUT. In this book an HiL simulation framework is proposed that allows predictable interaction of a distributed HiL simulator and an SUT. This HiL simulation framework comprises configurable simulation components which are interconnected via a time-triggered interaction mechanism. Information flow between the HiL simulator and the SUT is strictly controlled by the progression of synchronized global time and bound to a priori known latency and jitter. This book addresses researchers and engineers in safety-critical domains such as the avionics or automotive industries.

Medios de comunicación Libros     Paperback Book   (Libro con tapa blanda y lomo encolado)
Publicado 21 de abril de 2008
ISBN13 9783836462167
Editores VDM Verlag Dr. Müller
Páginas 156
Dimensiones 150 × 220 × 10 mm   ·   213 g
Lengua Inglés