Recomienda este artículo a tus amigos:
Redundant Binary Booth Multipliers: Algorithm, Design, Analysis
Yajuan He
Redundant Binary Booth Multipliers: Algorithm, Design, Analysis
Yajuan He
Most of the research in digital multipliers in the last few decades has focused on reducing the delay of partial products accumulation. In the era of pervasive computing, however, the emphasis of VLSI design is on both high speed and low power operation. This book has presented several new insights into the high speed and energy-efficient redundant binary (RB) multipliers. Advances in the architectural innovation have been made over previous RB multiplier architectures. A structural approach has also been proposed to analyze the performance of N×N-bit RB multiplier constructed with a conglomerate of redundant binary partial products generation, encoding, reduction and conversion methods. Based on this analysis, the RB multiplier design space can be further enlarged through the informed decisions of the relative merits and tradeoffs of these architectural options.
Medios de comunicación | Libros Paperback Book (Libro con tapa blanda y lomo encolado) |
Publicado | 16 de julio de 2010 |
ISBN13 | 9783838379180 |
Editores | LAP LAMBERT Academic Publishing |
Páginas | 172 |
Dimensiones | 225 × 10 × 150 mm · 258 g |
Lengua | English |
Ver todo de Yajuan He ( Ej. Paperback Book )